Patent #

Date

Title

US7509551

2009-03-24

Direct logic diagnostics with signature-based fault dictionaries

US7435990

2008-10-14

Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer

US7103816

2006-09-05

Method and system for reducing test data volume in the testing of logic products

US6782501

2004-08-24

System for reducing test data volume in the testing of logic products

US6708305

2004-03-16

Deterministic random LBIST

US6611933

2003-08-26

Real-time decoder for scan test patterns

US6041429

2000-03-21

System for test data storage reduction

US5617426

1997-04-01

Clocking mechanism for delay, short path and stuck-at testing

US5612963

1997-03-18

Hybrid pattern self-testing of integrated circuits

US5375091

1994-12-20

Method and apparatus for memory dynamic burn-in and test

US4377757

1983-03-22

Logic module for integrated digital circuits